19.1. Targets, Prerequisites, and Commands

Before we describe the make solution, we will briefly review the problem. To make an executable program, we need to link compiled object files. To generate object files, we need to compile C source files. The source files in turn need to be preprocessed to include their header files. And whenever we have edited a source or header file, then any file that was directly or indirectly generated from it needs to be rebuilt.

The make utility organizes the work just described in the form of rules. For C programs, these rules generally take the following form: the executable file is a target that must be rebuilt whenever certain object files have changedthe object files are its prerequisites. At the same time, the object files are intermediate targets, which must be recompiled if the source and header files have changed. (Thus the executable depends indirectly on the source files. make manages such dependency chains elegantly, even when they become complex.) The rule for each target generally contains one or more commands, called the command script, that make executes to build it. For example , the rule for building the executable file says to run the linker, while the rule for building object files says to run the preprocessor and compiler. In other words, a rule's prerequisites say when to build the target, and the command script says how to build it.